Description
Principal Hardware Engineer (FPGA) - *ASAP Start* - Munich, Germany – 1 Year - 80 EUR/hr – 100% OnsiteUnique opportunity to work as an engineer in our clients cutting-edge Equity IT team. This is a very high profile group within the trading group which has made clear its intention to regain the market share of a recently acquired divisions of another large investment bank and leveraging their high speed/high performance connectivity platforms. This is a fantastic opportunity to help define and drive change in one of the most innovative areas within financial technology at this time.
Principal Accountabilities:
Working in the Connectivity development team to design and build solutions for our ultra low-latency connectivity platform.
Maintain and enhance the reputation of our organization for providing innovative, performant, functionally rich and stable products in a fast-paced environment.
Take a leading role in the core development of the platform and in the continued expansion of our client offering and exchange coverage.
The ideal candidate will be a 'Completer Finisher' with a strong work discipline, resiliency and sense of ownership. The ability to operate under pressure is essential. They will be delivery-focused and motivated by their own achievements and those of their team. They will be a strong communicator with the ability to build relationships with colleagues in both technology and the front office.
Desired Skills and Experience
Essential Experience –
• Digital design
• System Verilog/Verilog development
• FPGA (Xilinix, Altera) development lifecycle (simulation, timing closure, HW testing)
• Low level C/Assembler development eg device drivers
• Networking, TCP/IP/Futures Trading platforms and global Markets.