Keywords
Skills
- Programming - C/C++, Python
- OS – Linux & QNX.
- Tools – Eclipse, Visual studio Code, Git, CMake, Yocto, Enterprise Architecture, PTC integrity, Codebeamer, Doors, JIRA & Confluence.Cloud Basics – AWS, AZURE
- Programming - C/C++, Python
- OS – Linux & QNX.
- Tools – Eclipse, Visual studio Code, Git, CMake, Yocto, Enterprise Architecture, PTC integrity, Codebeamer, Doors, JIRA & Confluence.
- Cloud Basics – AWS, AZURE
Project history
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Performed Requirements Engineering/Management for PoC/Applications (Embedded Software)
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Developed Linux/QNX based Embedded Application Software Components.
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Developed Architecture/Detailed Design in Enterprise Architecture Tool (UML).
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Developed Embedded Application software in C/C++(11&above) modules compliant with ASPICE Process in Multiprocessor Architecture
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Hands on experience in Base software modules, ISO26262, & Configuration tools – Davinci Configurator, Developer/PREEvision/Canoe. Debugging and validation tools – Debugger, CAN Analyzer.
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Worked with protocols such as UART, SPI, I2C, CAN and UDS.
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Performed Unit & System testing in Vectorcast, Googletest.
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Worked with Autosar Vendor stacks – Vector / KPIT
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Performed Requirements Engineering/Management for PoC/Applications (Embedded Software)
-
Developed Linux/QNX based Embedded Application Software Components.
-
Developed Architecture/Detailed Design in Enterprise Architecture Tool (UML).
-
Developed Embedded Application software in C/C++(11&above) modules compliant with ASPICE Process in Multiprocessor Architecture
-
Hands on experience in Base software modules, ISO26262, & Configuration tools – Davinci Configurator, Developer/PREEvision/Canoe. Debugging and validation tools – Debugger, CAN Analyzer.
-
Worked with protocols such as UART, SPI, I2C, CAN and UDS.
-
Performed Unit & System testing in Vectorcast, Googletest.
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Worked with Autosar Vendor stacks – Vector / KPIT
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Assisted in development of Digital design & EDA Tools.
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Simulated VLSI & Embedded Software modules of FPGAs in INTEL QUARTUS PRIME.
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Assisted in developing SoC design of Nios 2 processors.