Yogesh Torvi available

Yogesh Torvi

Experienced FPGA Design & Embedded System Consultant for onsite and remote work

available
Profileimage by Yogesh Torvi Experienced FPGA Design & Embedded System Consultant for onsite and remote work from Pune
  • 411052 Pune Freelancer in
  • Graduation: Masters in Electronics & Telecommunications engineering
  • Hourly-/Daily rates: 20 $/hour
    Rates could be negotiated based on type and duration of work
  • Languages: English (Full Professional) | Hindi (Native or Bilingual)
  • Last update: 27.02.2020
KEYWORDS
PROFILE PICTURE
Profileimage by Yogesh Torvi Experienced FPGA Design & Embedded System Consultant for onsite and remote work from Pune
ATTACHMENTS
Yogesh CV

You need an account to view this information.

SKILLS
Overall Experience: 2 decades’ industry experience in N.America (U.S & Canada) & India, in the following areas
  1. System Design
  2. EDA Applications Engineering
  3. Technical Management
  4. Customer Management
Design & Verification Consulting / Services
  • FPGA Design (Xilinx, Intel, Lattice)
  • Embedded Systems (ARM / PIC / STM32 / NXP / 8051 /  Arduino )
  • FPGA Prototyping
  • IP Core Design
  • Logic / Physical Synthesis
  • Functional Verification
  • Hardware assisted simulation / verification
  • Silicon Validation / Prototyping / Emulation
  • Matlab - FPGA / Microcontroller based hardware - software codesign
  • Matlab – FPGA based system design
  • Matlab – Embedded Microcontroller based system design

Consulting Applications
  • Cryptography – Encryption / Decryption
  • Memory Controller
  • Communication Protocols
  • DO-254 Avionics Design
  • Wireless Communication
  • Digital Image Processing
  • Digital Signal Processing (DSP)
  • Wireless Sensor Network
  • Network on chip (NOC)
  • Industrial Automation
  • Automotive Electronics
  • Control Systems
  • Process Control (Textile Mills / .. )
  • Medical Device Prototype Design
  • Third Party Verification
  • Project Management
  • Technical Research

 
Recent Design Projects: (Implemented on a Xilinx FPGA)
  • Data Acquisition System
  • 5-Stage DLX RISC Processor Core
  • DLX Superscalar RISC Processor Core
  • Multi-Processor Cache Coherence Memory Management sub-system
  • Two-Level Adaptive Branch Predictor
  • Cryptography - Karatsuba Montgomery Modular Multiplier
  • MPSOC out of order execution scheduler (Scoreboarding Algorithm)
  • Discrete Wavelet Transform (DSP Digital Filter)
  • Network on Chip (NOC) - MESH Topology
PROJECT HISTORY
On Request
TIME AND SPATIAL FLEXIBILITY
  1. Europe
  2. Remote / Telecommute
  3. Asia
  4. North America
YOUTUBE - VIDEO
YouTube Profil Youtube Videos posted.
GET IN TOUCH

Message:

Senderdata: