Profileimage by Yogesh Torvi Highly experienced FPGA / CPLD Design & Embedded Systems Consultant Engineer from Pune

Yogesh Torvi

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Last update: 18.07.2023

Highly experienced FPGA / CPLD Design & Embedded Systems Consultant Engineer

Graduation: Masters in Electronics & Telecommunications engineering
Hourly-/Daily rates: show
Languages: English (Full Professional) | Hindi (Full Professional)

Attachments

Yogesh-Torvi-CV2_050623.pdf

Skills

Overall Experience: 2 decades’ industry experience in N.America (U.S & Canada) & India, in the following areas
  1. System Design (FPGA, Embedded Systems, Software Algorithms)
  2. EDA Applications Engineering
  3. Technical Management
  4. Customer Management
Design & Verification Consulting / Services
  • FPGA Design (Xilinx, Intel, Lattice)
  • Embedded Systems (ARM7 / Cortex-M4 / PIC / PIC32 / STM32 / NXP LPC / TI MSP / 8051 /  Arduino )
  • FPGA Prototyping
  • IP Core Design
  • Logic / Physical Synthesis
  • Functional Verification
  • Hardware assisted simulation / verification
  • Silicon Validation / Prototyping / Emulation
  • Matlab - FPGA / Microcontroller based hardware - software codesign
  • Matlab – FPGA based system design
  • Matlab – Embedded Microcontroller based system design

Consulting Applications
  • Cryptography – Encryption / Decryption
  • Memory Controller (Cache Coherence)
  • Communication Protocols ( UART Serial, SPI, I2C, CAN, LIN, Ethenet)
  • DO-254 Avionics Design
  • Wireless Communication (ESP8266, Bluetooth, BLE, 802.11,ZigBee)
  • Digital Image Processing
  • Digital Signal Processing (DSP) (FFT, DFT, IFFT, DIgital Filter)
  • Wireless Sensor Network 
  • Network on chip (NOC)
  • Industrial Automation
  • Automotive Electronics
  • Control Systems (Motor Control, PID Controller)
  • Medical Device Prototype Design
  • Technical Research
EDA Tools  / Software:
Xilinx ISE, Xilinx Vivado, Xilinx SDK, Coregen, Xilinx VITIS, ILA, SystemGenerator, Intel Quartus, Modelsim, SignalTap, ARM Keil, STMCUBEIDE, STM32 motor control workbench, MPLAB, Code Composer Studio, Matlab, Python Anaconda, Eclipse, Arduino IDE
 
Recent Design Projects: (Implemented on a Xilinx FPGA)
  • PCI Express end point implementation
    • Xilinx UltraScale FPGA DesignBLDC motor control using STM32 microcontroller
  • Data Acquisition System
    • Zynq SOC device
  • Image processing
    • Python programming, version 3.6
    • OpenCV library for image processing
    • Numpy, Matplotlib library for mathematical modeling
  • 5-Stage DLX RISC Processor Core
  • DLX Superscalar RISC Processor Core
  • Multi-Processor Cache Coherence Memory Management sub-system
  • Two-Level Adaptive Branch Predictor
  • Cryptography - Karatsuba Montgomery Modular Multiplier
  • MPSOC out of order execution scheduler (Scoreboarding Algorithm)
  • Discrete Wavelet Transform (DSP Digital Filter)
  • Network on Chip (NOC) - MESH Topology

Project history

On Request

Certifications

FPGA MPSOC
2023
AUTOSAR
2023

Local Availability

Only available in these countries: India
  1. Europe
  2. Remote / Telecommute
  3. Asia
  4. North America
Profileimage by Yogesh Torvi Highly experienced FPGA / CPLD Design & Embedded Systems Consultant Engineer from Pune Highly experienced FPGA / CPLD Design & Embedded Systems Consultant Engineer
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