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Convert AHDL to VHDL

Stockholm County, Stockholm

Keywords

FPGA VHDL

Description

Existing proprietary AHDL blocks for Intel/Altera should be converted into VHDL for a Lattice FPGA.
Start date
10.2022
Duration
1 months
(extension possible)
Published at
09.09.2022
Contact person:
Anders Fagergren
Project ID:
2458820
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