Description
System Verification Engineer required to work proactively within a team across a number of international programmes.
Typical activities will include:
Definition of the Test Equipment architecture, its logical design and the key design decisions and characteristics. Alignment with existing products and identification of capability gaps.
Development and maintenance of project-specific verification models derived from Product Line system (SysML) models, adopting the product line design patterns and processes. (SysML/UML - preferably Rhapsody).
Liaison with the Test Equipment Design and Implementation team to coordinate the onward development of the verification architecture.
Development of Design Verification Plans and Trials Proving Instructions.
Work with the Integration and Systems Validation Team to coordinate sub-system verification interaction with system level verification activities.
Development of processes and procedures to support the Architecture definition. This includes configuration control, requirements management, validation/verification strategies, baseline definition, etc
General Systems Engineering studies and investigations to support Architecture definition, including trade-off analysis.
Manage and maintain requirements and design baselines, particularly where multiple customers are supported.
The successful candidate will have the below skills:
Sound understanding of a System Engineering process (including System and Sub-System Specification, System Test and Integration).
Knowledge of tools for Requirements Capture and Control (DOORS) and Configuration Management (Dimensions).
Candidates must be willing to undergo a security vetting procedure.