Description
Senior Hardware Engineer (Electrical)
Job Purpose:
Responsible for complex design and development tasks and hardware engineering of high grade cryptographic equipment.
Key Responsibilities:
Responsible for complex design and development tasks.
Develop a variety of engineering methods and techniques which can be applied and adapted as necessary to create solutions.
Expected to be able to liaise with customers and external bodies as needed.
Identify cost-effective solutions in terms of both development time and materials.
Supervision is only required on more complex tasks.
Seek input from peers and manager as required ensuring that work has been reviewed to a suitable level.
Clear presentation of proposals with ability to constructively debate input from others.
Provide a level of technical leadership at all times and share knowledge willingly.
Actively encourage and propose ideas for improvement.
Manage security of information as defined in the Security manual
Knowledge, Skills and Experience:
Competent with schematic capture and understands how to constrain layout using rules/classes/groups.
Understands best practice in probing techniques and pragmatically applies the correct probing dependent on required accuracy of measurement.
Can optimise complicated circuits to achieve power reduction.
Competent in power supply design and familiar with most topologies.
Can analyse performance across process, voltage and temperature variations.
Understands signal integrity problems and can select appropriate terminations.
Understands power distribution networks and strategies to efficiently and effectively mitigate.
Can devise HW architecture to meet requirements using appropriate technology to meet cost targets.
Uses advanced SPICE techniques to ensure circuits are modelled against variable parameters.
Determines verification test requirements and devises appropriate test plans.
Understands best practice design for EMC and TEMPEST and can resolve seemingly conflicting requirements based on electromagnetic theory.
Understands EMC and TEMPEST test techniques and methods and can design suitable test harnesses.
Can optimise PCB stack-up design.
Understands electronic assembly failure modes and investigatory techniques.
Candidates must be SC Cleared or eligible to undergo a security vetting procedure.
If you're interested and would like more information please contact Dale Williams or email: (see below), or if you would like to have a chat in confidence regarding your situation give me a call.