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UVM Verification Engineer - contract

DK  ‐ Onsite
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Keywords

Semiconductor Verilog

Description

I'm working with a well known semiconductor company in Scandinavia (Denmark and Sweden) seeking a Verification Engineer for 6-12+ month opportunity:

  • Experience in Digital Verification
  • Knowledge in UVM
  • Experience in System Verilog

Reply ASAP if interested and I will call you.

€500 for any recommendation you suggest that we place.

Best regards,

James Toynton

Start date
September
Duration
12months +
(extension possible)
From
Eurostaff Group Limited
Published at
22.08.2017
Project ID:
1402581
Contract type
Freelance
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