IC Digital Design Engineer

Cheshire  ‐ Onsite
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Description

Proteus Europe is searching for an IC Digital Design engineer for a 3 month contract in the North of England.

Our Client:-
My client are a dynamic and exciting start-up company working to develop to develop a complete frequency and timing product which is optimised for emerging markets

Your New role:-

A digital design engineer is required to take several small blocks through from specification to PandR. The blocks are in some cases already implemented, but require modifications to support spec changes and testing.

Blocks will be implemented in both gate level format and in Verilog format for synthesis.

Your Skills and experience:-

Essential Skills:-
The applicant should have experience of generating and testing relatively simple digital filters using Verilog within the Cadence environment. Candidates should be able to develop testbenches which thoroughly exercise the blocks

Candidates should be able to generate timing constraint files, and be familiar with the PandR flow, and re-simulation with SDF back annotation.

Desirable Skills:-
Applicants with Octave or Matlab experience would a benefit.

Ideally candidates will also have some experience of using Cadence Encounter or VDI synthesis and PandR tools, and in using/developing scripts for these.

Proteus Europe operates in partnership with our candidates by building strong and lasting relationships at all levels.

If you apply for this role, we will:

- Contact you within one week to discuss your current situation and suitability for this role.
- Keep you informed at every stage of the recruitment process.
- Actively follow up with our client on your behalf to gain useful feedback throughout the process.

Start date
n.a
Duration
3 months
From
PROTEUS EUROPE
Published at
28.11.2017
Project ID:
1460670
Contract type
Freelance
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