Description
FPGA, fabric Fmax, FPGA fabric Fmax, Xilinx ISE, Vivado, xdc, sdc, Altera, Intel, Arria V, Stratix V, Arria 10, Virtex 7, Virtex Ultrascale, Virtex Ultrascale+, high speed designs, circuit design, Low latency, ACIC, VHDL, Verilog
Role: FPGA Engineer
Location: Cambridge
Contract: 6 months +
Our leading client requires a Senior FPGA Engineer to improve operating frequencies for our large, generated, FPGA designs, and plan and develop the circuit building blocks to be instantiated by the next iteration of our software. This is a great role working on next-generation hardware. You will work with our compiler development team to improve FPGA resource usage and achieving timing closure. You will work with our machine learning experts and lead architect to develop novel circuit implementations for machine learning algorithms.
Responsibilities
*FPGA Floor planning for pre generated designs
*Develop high-quality circuit design and architecture
*Achieve operating frequencies close to FPGA fabric Fmax for generated designs
*Minimize FPGA resource usage
*Identify, prioritize and execute tasks in the circuit development life cycle
*Automate tasks through appropriate tools and Scripting
*Review and debug code
*Perform validation and verification testing
*Experience designing for modern high-speed Altera/Intel devices: Arria V, Stratix V, Arria 10
Skills & Qualifications
*Expert knowledge of achieving timing closure for complex and high speed designs targeted at large FPGA devices through developing timing constraints (xdc, sdc), and using manual floor planning (Logic Lock, Pblock, RPM) where appropriate
*Digital design including interfacing to hardware, peripherals and processors
*In-depth knowledge of Quartus and its respective Scripting environments and command-line tools
*VHDL, particularly targeting Altera/Intel devices (including SoC devices)
*Experience designing for modern high-speed Altera/Intel devices: Arria V, Stratix V, Arria 10
*Some knowledge or interest in functional programming eg OCaml, Haskell, F#, etc.
Desirable:
* In-depth knowledge of: Xilinx ISE/Vivado, and their respective Scripting environments and command-line tools
* Experience designing for modern high-speed Xilinx devices: Virtex 7, Virtex Ultrascale, Virtex Ultrascale+
* Familiarity with various OSs and standard development practises eg CI, Git etc.
If you are interested in this role please contact Craig Calvert: (see below)
FPGA, fabric Fmax, FPGA fabric Fmax, Xilinx ISE, Vivado, xdc, sdc, Altera, Intel, Arria V, Stratix V, Arria 10, Virtex 7, Virtex Ultrascale, Virtex Ultrascale+, high speed designs, circuit design, Low latency, ACIC, VHDL, Verilog
Spring Technology is acting as an Employment Business in relation to this vacancy.
Spring Technology is an Equal Opportunities employer; we welcome applicants from all backgrounds.