Description
IC Design & Verification Engineer - Limburg, Netherlands - January Start - 18 Months - 80 - 90 EUR/hrResponsibilities may include, but are not limited to:
- Design activities including research, definition, design, and simulation of integrated circuits
- Perform RTL design of block level modules
- Simulate RTL at the block level and SoC level to guarantee design objective specification functionality and timing
- Perform mixed-signal simulation at the SoC level to guarantee design objective specification functionality and timing
- Simulate and debug gate level timing simulations at SoC level
- Defining system and block level test plans
- Characterizing and validating circuit performance in the lab
- Writing and maintaining simulation scripts
Qualifications
- Knowledge of digital and mixed-signal IC design fundamentals
- Verilog, System Verilog, RTL, Digital Design
- Write reusable RTL code, follow design and DFT guidelines
- Run digital simulations using industry standard tools
- Background in C and assembly language programming
- Hands-on IC design experience
- Write scripts using Perl, Python, Makefiles, and other common languages
- Superior analytical and problem solving skills
- Strong background in processor design preferred
- Have experience with System Verilog for verification, OVM/UVM, assertions, cover points