Description
FPGA Verification Engineer - Stockholm, Sweden - Remote PossibleQualifications
Candidate will be responsible for FPGA/ASIC verification of space-based electronic systems using simulation and verification environments to prove the functional correctness of FPGA/ASIC designs.
What You'll Do
- Verify designs (including SOC architectures utilizing soft-core processors, digital filters, image processing algorithms, and communication interfaces/protocols), design and implement test benches and test plans for both chip-level and system level environments, and create reusable verification environments that can be used across multiple projects.
- Work in System Verilog/UVM environment and be responsible for generating FPGA verification plan, verification matrix and developing verification environments for test and verification of flight FPGA code/modules.
- Work collaboratively and in tandem with system architects, FPGA design engineers and embedded software engineers.
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What You'll Need
- Strong FPGA/ASIC Verification development methodology.
- Experience with System Verilog and UVM, and familiarity with electronic circuit design and electronic systems.
- A solid understanding of object-oriented concepts and experience designing class-based constrained random test benches.
- Experience with coverage writing (including coverpoints, crosses), coverage collection and improving coverage of the design under test.
- Experience with VHDL Modelsim/Questa simulator is a plus.
- Experience in C++ object-oriented programming is a plus.
- Knowledge and experience with Windows, Linux and scripting languages (e.g. Ruby, Python, TCL) is a plus.
- Experience in documentation and verification of high-speed digital electronics, FPGAs, and embedded processor systems is desired.
- Ability to develop specifications, cost, schedule, and resource requirements for FPGA or ASIC verification plans.
- Strong verbal and written communication skills, as well as strong presentation skills.