Senior ASIC verification Engineer

Description

One of our customers is looking for several Senior ASIC verification engineers. The customer develops very large and complex ASIC's with high technical demands.

The customer develops advanced telecom systems with high data rates.
You will working with among the most advanced and complex ASIC's in the world in 28 nm.
You will be working in a team of several ASIC developers.

Long Experience of working with complex ASIC verification with several DSP's, CPU's, many clock domains and high speed links
Long experience from top level verification and test coverage strategies
Experience from C programming for top level verification
Experience from formal verification, eg using assertions and constraints
Experience of design in VHDL
Fluent in English (verbal and writing)

Long experience from top level verification using TLM (transaction level model)
Experience of Specman (e language, tools and methodology and building eVC's)
Experience from block level verification, functional verification, test coverage strategies
Fluent in Swedish (verbal and writing)