Description
Years of Experience & Expertise Level:-Master of Science with 5+ years of experience in development of micro-architectural simulators (functional and performance/power models) for processors and/or programmable accelerator devices
Project Description:
-Simulation infrastructure for processors, programmable accelerator devices and on-chip interconnection networks.
Daily Responsibilities:
-Development and implementation of detailed simulation models of a programmable accelerator device
Necessary Skills (Must Have):
-MS CS/ECE with experience in processor simulation and performance/power model development.
-Strong working knowledge of computer architecture; cache hierarchies and on-chip networks.
-Strong working knowledge of C++ along with flexibility of working with other programming and Scripting languages (Perl, Python).
-Excellent communications skills, disciplined design approach and ability to work smoothly with a team.
Additional Skills Desired (Nice to Have):
- Understanding of processor simulation methodologies, including trace-driven and execution-driven simulation, separation of functional and timing simulation, etc.
-Experience with binary instrumentation.
-Knowledge of Reconfigurable Logic and Array Processors.
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