FPGA/ASIC Design and verification

Stockholm

‐ Onsite

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Keywords

Our Telecom-client is looking for Digital ASIC/FPGA designers/verifiers for Radio Base Station Units.

Competence:

Master of Science Electrical Engineering, Computer Engineering or equivalent academic qualification.

SystemVerilog or Specman

Cadence E -programming

C -programming

VHDL

Preferred experience

Formal verification/equivalence check

Note

The client is not looking for specific FPGA/ASIC Back End or synthesis experience

Site: Stockholm

Start: July/August - maybe sooner

End: Long term assignment

Language: English (required, Swedish preferred)

Work load: 100%

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