CMOS IC Digital Layout engineer

Noord-Brabant  ‐ Onsite
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Keywords

Description

CMOS IC Digital Layout engineer - Netherlands - CMOS IC Digital Layout engineer

Scheduled start: scheduled expiration:

Location: Eindhoven

Brief project description: This specific request is about a design of a secure identification design P40 platform in C090 technology.

Seniority: > 5 -

Scope of work: The Digital CMOS IC Layout engineer receives his/her instructions from the design manager and/or from the project leader. He/she decides on technical aspects of the test items and needs to consult the line manager if planning or budget consequences arise from such decisions. The Digital CMOS IC Verification engineer works according to the BU-ID verification way-of-working, but different insights and methods are encouraged.

Sector know-how: Semiconductor > 5 years

Foreign language: English speaking and writing

Project language: English

Templeton are pleased to have been listed in the 2012 Recruiter magazine Fast 50, a ranking of the 50 fastest growing recruitment companies in the UK based on audited figures in Companies House. We were placed 1st out of pure IT Recruitment companies and wish to thank you for contributing to our past, current and future success.

Start date
ASAP
Duration
12 months
From
Templeton and Partners
Published at
23.10.2012
Project ID:
437938
Contract type
Freelance
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