Description
Our leading international Semiconductor partner is looking for Memory Controller Verification Engineer. You will provide extended verification of delivered Non Volatile Memory Controller IP s.
PROJECT DESCRIPTION:
Flash and EEPROM Memories are delivered with advanced controller to interface with standards buses (AHB and APB protocols). To guarantee the correctness of these controllers, functional coverage verification is performed based on Universal Verification Methodology (UVM).
RESPONSIBILITIES:
- To provide verification of delivered Non Volatile Memory Controller IP s based on advanced methodology
- Check controllers and protocol compliance as per protocol specification
- Provide a generic verification environment (Flash/eeprom, c14/c090)
- Implement UVM methodology and associated uVC verification components (use of out-of-the-shelves available uVC for APB/AHB)
- Implicit check of the memory IP Verilog models and Memory-controller protocols
REQUIRED EXPERIENCE:
- UVM (Specman, System Verilog) experience: > 5 years
- RTL (Verilog), synthesis experience: 3-5 years
- Memory controllers (Flash, EEPROM) experience: 3-5 years
- Design For Test experience: 3-5 years
- Project language: English (good level required)