Description
An ASIC Design and Verification engineer is needed for an urgent contract based in the South of the UK requiring the following skill set:- Experience with RTL Design and Verification
- Knowledge of VHDL/Verilog
- Experience with OVM/ UVM and SystemVerilog is not essential but would be beneficial
An experienced ASIC Design and Verification engineer is urgently required for a very important client of IC Resources. The role is based in the South of the UK and requires a start in the coming weeks for on site work. The role requires a good general Digital Front end engineer with extensive experience in both Design and Verification. Experience in VHDL would be ideal however, experience in Verilog is also acceptable.
If you feel you have the broad experience to successfully complete the above role then please do not hesitate to contact Tom Huggins at IC Resources.
Notes: 3 months. South of the UK, VHDL, Verilog, RTL, Verification, Design
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