Sr. ASIC Design Engineer Consultant

Description

Job Summary
Key member of ASIC design group. Expected to do module level specification, micro-architecture, Verilog RTL design, module verification and synthesis of relevant modules. Expected to trade off design complexity with timing and power. Expected to assist in timing closure of the chip and/or blocks and other responsibilities of ASIC design and lab validation.

Job Requirements

• Responsible for micro-architecture of complex modules in ASICs
• Responsible for RTL Coding, Block level simulations and Synthesis
• Work closely with backend team during P&R and timing closure
• Work closely with Silicon Validation and System Integration teams to bringup the ASIC and the system

Experience and Education

• Candidate must have a Bachelor's Degree or higher in EE with very good academics. Master's degree preferred
• 5+ years of experience in ASIC Design
• Participation in at least 2 full ASIC cycles as a designer from Arch to Bringup
• Good knowledge and experience in RTL/Synthesis based ASIC design methodology and tools
• Good in logic design skills (micro-architecture development and implementation)