FPGA Design Consultant

Description

PRIMARY RESPONSIBILITY

The Principal FPGA Design Engineer will be the technical lead and perform all chip level logic and signal processing design, simulation, debugging and integration tasks for our point to multi-point wireless products.

ESSENTIAL DUTIES AND RESPONSIBILITIES

• Supporting the generation of sub-system and system level specifications, product architecture and functional partitioning
• Executing detailed module and sub-system design, simulation and verification.
• Leading the effort of implementing, debugging, and verifying the sub-system in chip and in system.
• Providing required design documents, reviewing test results and conducting design reviews.
• Interfacing with DSP, software and hardware designers to support software, hardware and system development.
• Participating in sub-system and system level integration, validation, and trouble shooting
• Mentoring junior engineers and provide technical guidance.

Desired Skills and Experience

Experience

A minimum of 8 years' full-time working experience in logic designs for FPGA or ASIC is required.

Knowledge, Skills and Abilities

• Extensive high-speed digital design experience. Familiar with the latest FPGA or ASIC technology.
• Expert level proficiency with VHDL (desired) or Verilog, logic simulation and implementation tools for large complex designs.
• Work knowledge in at least two of the following areas:
• Good knowledge and working experience with commonly used IC devices.
• Familiarity with common lab equipment and tools.
• Highly motivated individual with a strong desire to work and excel in an innovative environment.
• Good verbal and written communication skills and communicates well across functional groups.
• Has the ability and willing to mentor junior level engineers
• Design and implementation of advanced wireless PHY, including array signal processing functions for MIMO, beam-forming, or interference cancellation, in FPGA or ASICs.
• Design and implementation of major MAC functions of LTE or WiMAX system.
• Implementation of DSP algorithms in FPGA or ASIC, including: digital filtering, resampling, control loops, PLL's, and channel equalization.
• High speed CPU and DDR3 memory interfaces, including PCIe, DMA, and high speed serial buses.
• Ethernet packet processing: good knowledge of Ethernet switches and Ethernet interfaces.
• Good knowledge and working experience with commonly used IC devices.
• Familiarity with common lab equipment and tools.
• Highly motivated individual with a strong desire to work and excel in an innovative environment.
• Good verbal and written communication skills and communicates well across functional groups.
• Has the ability and willing to mentor junior level engineers