Verification Engineer (SOC)

Description

Our client are looking for a Lead Design Verification Engineer with well-established knowledge of SoC design, especially in the IP-cores verification

As the Lead Design Verification Engineer you will organize, optimize and coordinate the following activities:

Verifying the integrated circuits
Verifying the systems on chip (SoC)
Creating new test benches
Defining requirements for new and current projects
Coordinating work of verification engineers in product line (on the leader position)
Coordinating verification activity in product line (on the leader position)
Requirements
Master of Science in Electrical / Computer Science
Digital design experience
Skills of Semiconductor IP design / FPGA design
Established knowledge of object oriented programming / C++
Experience in use SystemVerilog / SystemC / SVA
Additional advantage will be ability to use OVM / UVM TB
Fluency English language
Team management skills
Good communication skills
Organization and time management skills
Knowledge of one of the following will be welcome:
Linux system / serial communication protocols (e.g. USB, MIPI)/ interfacing NAND Flash memories / SDIO, SD or e·MMC standards