IT
Design Verification Engineer Lead - Bulgaria
Sofia, Bulgaria20% remoteFreelanceasap
Posted by
DCV Technologies
Contact person
Marcillina Tietjen
Project ID
2936400
Business To BusinessC++ (Programming Language)DebuggingSystemVerilogTest PlanningComputer Architecture
Description
Dear Consultant,
We are looking for an experienced Design Verification Engineer Lead with strong expertise in SystemVerilog / C++ and hands-on experience across the full silicon design lifecycle.
The role focuses on developing UVM testbenches from scratch, debugging complex SoC designs, and driving verification quality.
Send CV to (marcillina.tietjen@dcvtechnologies.co.uk ) if you are based in Bulgaria and interested.
Location: Bulgaria
Type: B2B Contract
Experience: 5–8 years
Key Skills & Experience
5–8 years of Design Verification experience.
Strong in SystemVerilog and C++.
Proven experience developing UVM testbenches from scratch.
Deep understanding of computer architecture.
Experience in test planning and debugging complex designs.
Exposure to caches and memory subsystems (preferred).
Keywords: Design Verification, SystemVerilog, UVM, C++, SoC, Computer Architecture, Silicon Design, Bulgaria