IT
FPGA / Adaptive SoC IP Architect
Sofia, BulgariaOn-siteFreelanceasap
Posted by
DCV Technologies
Contact person
Marcillina Tietjen
Project ID
2971917
Advanced Microcontroller Bus ArchitectureArchitectureArchitectural DesignAutomationContinuous IntegrationDesign FlowDesign StrategiesEthernetSemiconductorField-Programmable Gate Array (FPGA)GovernanceScalabilityPython (Programming Language)PCI ExpressQuality ManagementSystem On A ChipSystemVerilogTcl (Programming Language)Technical ManagementVivadoGitCoaching and Mentoring
Description
Dear Consultant,
We are seeking an experienced FPGA / Adaptive SoC IP Architect to lead the design and architectural strategy of high-performance IP targeting FPGA and Adaptive SoC platforms.
The role focuses on RTL architecture ownership, high-speed protocol integration, and end-to-end design flow leadership, ensuring scalability, performance, and long-term maintainability of IP solutions.
Location: Bulgaria (Remote / Project-based)
Client Type: Global technology / semiconductor programs
Key Responsibilities
Key Responsibilities
Lead IP architecture and RTL design strategy for FPGA and Adaptive SoC platforms
Define timing closure methodology and integration approaches
Own architectural decisions ensuring scalability, performance, and maintainability
Lead FPGA / Adaptive SoC design flows including synthesis, P&R, and integration
Oversee implementation of high-speed protocol IP
Drive automation and quality standards using scripting and CI/CD governance
Provide technical leadership and mentorship to design teams
Required Skills & Expertise
System Verilog RTL architecture design for complex IP
High-speed protocols: 100Gb Ethernet, PCIe Gen5, AMBA / AXI
FPGA / Adaptive SoC design flow leadership:
Synthesis
Place & Route (P&R)
Timing closure
Integration
Vivado / Vitis expertise
Python / Tcl scripting for automation
CI/CD governance and Git workflow standards
Proven technical leadership and mentoring experience