Freelance Expert ASIC design (m/w/d)

Hesse  ‐ Remote
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Keywords

Application Specific Integrated Curcuits SystemVerilog Universal Asynchronous Receiver/Transmitter Field-Programmable Gate Array (FPGA) Recruitment

Description

Hello!

For a customer project in the field of ASIC design we are looking for an experienced freelancer (m/f/d) to support us in digital RTL development.

Project content:
• Development and maintenance of RTL code with focus on SystemVerilog
• Implementation of linting and CDC checks
• Integration of DFT aspects into the design
• Integration and interface definition of serial communication protocols (SPI, I²C, I³C, UART)
• Focus on ASIC (not FPGA)

Must-have skills:
• Very good knowledge in SystemVerilog and RTL design methods
• Extensive experience with ASIC design
• Experience in linting tools and CDC analysis
• Practice in ASIC development process including synthesis and timing
• Familiarity with DFT concepts
• Knowledge in serial protocols: SPI, I²C, I³C, UART

Framework data:
• Start: immediately / by arrangement
• Duration: long-term project (initial 6 months with option to extend)
• Workload: preferably full-time
• Remote share: high remote share possible, occasional onsite appointments with the customer (DACH region)
• Language: English

If you are interested I am looking forward to your reply by mail.

Best Regards
Gaetano Marrone

Recruitment Consultant



NEO Group
Fraunhoferstr. 9
85737 Ismaning

Telefon:
Mail:

Start date
ASAP
Workload
100% (5 days per week)
Duration
6 months
(extension possible)
From
NEO - Professional Solutions GmbH
Published at
14.06.2025
Contact person:
Johannes Kahra
Project ID:
2888353
Industry
Automotive
Contract type
Freelance
Workplace
100 % remote
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