Description
Leading edge wireless client requires VHDL developer with experience and knowledge in DSP and communications systems. This will be a long term project, based hybrid on/off site in Hertfordshire, inside IR35, areas of experience required;
Experience RTL coding in VHDL, could be ASIC or FPGAFamiliar with QuestaSim/ModelSim, Git, TCL Scripting
Experience with implementing DSP functions on FPGA/ASIC
Please send CV for more details.
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