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Jacek Cichopek

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Last update: 06.06.2022

Digital Designer/Verifier

Company: MULTISYS
Graduation: Silesian University of Technology (Poland) - 2007
Hourly-/Daily rates: show
Languages: English (Full Professional) | Polish (Native or Bilingual)

Attachments

jacek-cichopek-cv.pdf

Skills

Technical skills:
- ASIC/FPGA design and verification (SystemVerilog OVM/UVM),
- safety critical designs (DO - 254, ISO26262),
- high speed digital design,
- HW/SW integration,
- Hardware Tests definition, execution and results review,
- configuration management, change management,
- project technical documentation.
- Requirements based development

Project management skills:
- project management documentation, project development planning,
- technical engineering project lead,
- setting/leading Project Management meetings,
- project management meetings participation,
- process oriented development,
- quality management,
- development processes definition.

Tools:
ModelSim, Questa, OVM/UVM, DOORs, emacs, Synpify, Actel Designer, HyperLynx, SVN, RCS,
eProjects, JIRA, ClearQuest, ClearCase, DesignSync, SimVision.

Programming languages and technologies:
- VHDL,
- Verilog/SystemVerilog,
- OVM/UVM
- assembler,
 -VB for Applications,
- scripting languages.
- Actel,
- Xilinx
 

Project history

I have been working with Jacek for 4 months on one of the projects. He is very self motivated and result oriented. He has vary strong technical skills. I also see him as a very effective communicator. He is very energetic, open minded and can adapt quickly to different development project environments.
Przemyslaw Kosyk (KOSYSTEM)

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