it
Keywords
Routing
Adobe Flash
Flash Memory
Floor Planning
Graphic Design
Parasitology
Requirement Prioritization
Linux Virtual Server
Physical Verification
Computer-Aided Design
Skills
I'm a layout designer and my experience is 23 years of IC custom layout of block level, macro level and top level; floor planning, routing and physical verification for memory devices including NOR Flash, NAND Flash and 3D NAND.
professional skills: Layout design of flash memory products(NOR, NAND, 3D NAND): - feasibility studies, floor-plan, power plan - full custom blocks layout design, integration and routing - final layout verification checks (DRC, LVS, Antenna, XOR, etc.) and parasitic extraction - database management, archiving and tape-out Experience with Cadence and Mentor tools. Experience with VXL. High level proficiency in using Calibre and Hercules tools (LVS, DRC, ERC, parasitic Extraction, DFM ecc...)
Experience on analog layout techniques for device matching, minimizing parasitics and high power routing, common centroid layout, shielding, use of dummy devices, electromigration. Good knowledge of microsoft office tools (OneNote, Outlook, PowerPoint, Excel, Word ...).
I have spent the last 4 years as layout team leader (up to 12 direct reports).
My responability in this role was:
▪ Training the team’s technical skills and cultural healthiness
▪ Manage performance and development of team members.
▪ Leading and tracking layout schedules for Flash Nand and 3D Nand, identifying and prioritizing
project tasks and risks.
▪ Organize, prioritize, and manage logistic on tasks and resource allocations for multiple projects.
▪ Working cross functionally with CAD, process technology and circuit design teams in flow
improvements, next generation process evaluations and execution.
▪ Developing IC custom layout of block level, macro level and top level; floor planning, routing and
physical verification to meet schedule and milestones
professional skills: Layout design of flash memory products(NOR, NAND, 3D NAND): - feasibility studies, floor-plan, power plan - full custom blocks layout design, integration and routing - final layout verification checks (DRC, LVS, Antenna, XOR, etc.) and parasitic extraction - database management, archiving and tape-out Experience with Cadence and Mentor tools. Experience with VXL. High level proficiency in using Calibre and Hercules tools (LVS, DRC, ERC, parasitic Extraction, DFM ecc...)
Experience on analog layout techniques for device matching, minimizing parasitics and high power routing, common centroid layout, shielding, use of dummy devices, electromigration. Good knowledge of microsoft office tools (OneNote, Outlook, PowerPoint, Excel, Word ...).
I have spent the last 4 years as layout team leader (up to 12 direct reports).
My responability in this role was:
▪ Training the team’s technical skills and cultural healthiness
▪ Manage performance and development of team members.
▪ Leading and tracking layout schedules for Flash Nand and 3D Nand, identifying and prioritizing
project tasks and risks.
▪ Organize, prioritize, and manage logistic on tasks and resource allocations for multiple projects.
▪ Working cross functionally with CAD, process technology and circuit design teams in flow
improvements, next generation process evaluations and execution.
▪ Developing IC custom layout of block level, macro level and top level; floor planning, routing and
physical verification to meet schedule and milestones
Project history
Local Availability
Only available in these countries:
Italy
