Description
We are looking for a
Physical Design Engineer (m/f)
Reference: -en
Start: asap
Duration: 6 MM++
Place: in Bavaria
Branch: Herstellung von sonstigen elektronischen Bauelementen
Your tasks:
- Develop and apply methodologies for the Static Timing Analysis (STA) sign-off process for Foundry and IFY process, ranging from 16nm to 140nm
- Update existing signoff environment based on updated hardware data
- Review digital timing signoff guidelines, partially SPICE simulation for validation
- Assess foundry signoff suggestions
- Review signoff corner definition to reduce signoff efforts
- Generate scripts to implement the IFX Timing signoff regulations for use in R2G flow
- Implement a verification environment for timing signoff qualification
Your qualifications
- Profound experience in static timing analysis with PRIMETIME
- Profound knowledge of statistics and background knowledge of uncertainties in chip design, timing verification
- Experience in digital implementation flow DC/ICC
- Good experience with SPICE simulations
- Programming skills with TCL, C, Python, (UNIX environment)
- Very good command of English
Skills:
- Hardware developer
Keywords: Hardwareentwickler