Senior digital verification engineer UVM (m/f)

Gratkorn  ‐ Onsite
This project has been archived and is not accepting more applications.
Browse open projects on our job board.

Description


We are looking for a
Senior digital verification engineer UVM (m/f)

Reference: -en
Start: 07/17
Duration: 3 MM+
Place: in Gratkorn
Branch: Elektronik

Your tasks:
  • Verification of contactless RFID
  • Writing new test cases and models for a new scale coverage of a UVM test bench


Your qualifications
  • Know-how of digital verification
  • Profound experience in System Verilog
  • Solid experience in using Cadence
  • Fluency in English
  • Experience in translation of functional requirements into verification plans



Skills:
- Hardware developer


Keywords: Hardwareentwickler
Start date
07/17
Duration
3 MM+
(extension possible)
From
Hays AG
Published at
19.05.2017
Contact person:
Kerstin Werner
Project ID:
1346809
Contract type
Freelance
To apply to this project you must log in.
Register