Description
My consultancy client requires the services of an Electronics Engineer for an initial 6 month contract on site with an end client based near Marseilles (France).
The role:
- Develop Verification Plan and Verification Architecture
- Develop GPU subsystem tests
- Develop low power use cases and test scenarios
- Implement Functional Coverage Points
- Achieve 100% Functional Coverage
- Develop Verification Plan Documentation and Capture Results of Execution
Key Skills:
Must Have
- Top level verification know-how
- Verification Plan
- C
- Testbench
- VHDL/Verilog simulation and debug
- Scripting
Nice to have
- Low Power simulation (UPF)
- Gate level simulation
- HVL: Specman or SystemVerilog is a plus
- Good to have GPU architecture knowledge
- Understanding of power aware architecture
Must have
- 4 - 7 Years Of Experience
- Performing feature extraction from a specification
- Coverage closure
- At least 3 years experience of using Cadence IUS
Nice to have
- Experience of other HVLs (eg System Verilog) and methodologies (eg UVM)
This is an urgent requirement and I have interview slots available immediately. Please send me an updated CV if you are interested. Please note, candidates MUST be eligible to work in the EU.