Description
We are looking for a
Physical Design Engineer (Layout) (m/f)
Referenz: -en
Beginn: asap
Dauer: 12 MM
Ort: in Styria
Branche: Elektronik
Ihre Aufgaben:
- Physical design tool and flow knowledge
- IC Floorplaning high optimized analog layout
- Focus on digital place & route tools
- Knowledge in Layout Verification and Extraction Tools
- IC packaging support
Ihre Qualifikation
- CADENCE Virtuoso
- CADENCE First encounter ultra
- CADENCE PVS
- Silicon process technology
- Semiconductors Industry
Skills:
- Hardware developer