Description
This is a contract position for a 6 month minimum contract based in Manchester.
You will be working on the planning, documentation, design, test and commissioning of the FPGA designs.
You will need to have experience in;
- FPGA/ASIC RTL design - using Verilog/VHDL.
- Simulation (modelsim) and synthesis (altera quartus II).
- Design debug using test equipment.
Any further experience will be a bonus.
For more information, please send your CV