AS

Abdelrahman Sayed

available

Last update: 07.05.2024

Electronics Engineer

Graduation: Electronics Engineer ( vhdl engineer)
Hourly-/Daily rates: show
Languages: English (Limited professional) | French (Elementary)

Keywords

Digital Electronics Field-Programmable Gate Array (FPGA) Github VHSIC Hardware Description Language (VHDL) Git Pcb Layout

Attachments

Abdelrahman_060524.pdf

Skills

Digital Circuits, FPGA design, Git, GitHub, MS Office PowerPoint, MS Office Word, VHDL

Project history

07/2018 - 05/2024
on-site assistant
Agiba Petroleum


12/2023 - 02/2024
I craft high-performance digital circuits using VHDL, bringing hardware to life within FPGAs for cutting-edge applications like image processing.

Boundary Scan Testing Module for Testing of Digital Integrated Circuits using FPGA design.

05/2023 - 07/2023
Design and implementation of test pattern generators (TPGs) with high fault coverage in digital integrated circuits.
FUE (Other, 10-50 employees)

Design and implementation of test pattern generators (TPGs) with high fault coverage in digital integrated circuits.

Local Availability

Open to travel worldwide
Profileimage by Abdelrahman Sayed Electronics Engineer from cairo Electronics Engineer
Register