AV

Aparna V.T

available

Last update: 02.12.2014

Former Intern at PLX Technology, Bangalore

Graduation: VLSI Design - Masters Degree
Hourly-/Daily rates: show
Languages: English (Full Professional)

Skills

Verilog, VHDL, ASIC, SoC, Semiconductors, System Verilog, VMM, RTL design, Functional Verification, Digital Circuit Design, MATLAB, C, C++, C#, Embedded systems, Modelsim

Project history

PLX Technology
Intern
06.2013 - 05.2014
Verification of the PCI Express Switch Features Using System Verilog (VMM Methodology)



Robert Bosch Engineering and Business Solutions
Software Engineer
05.2010 - 06.2011
Independently handled Application Development in Windows using Visual C# to showcase the use cases for Bosch Sensors.


 

Local Availability

Only available in these countries: United Arab Emirates
Available to work remotely from home
Profileimage by Aparna VT Former Intern at PLX Technology, Bangalore from Dubai Former Intern at PLX Technology, Bangalore
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