FPGA Engineer
Dracaena
Keywords
Field-Programmable Gate Array (FPGA)
C++ (Programming Language)
Debugging
Hardware Description Language
Linux Commands
MATLAB
PCI Express
System On A Chip
TCP/IP
Verilog
Skills
C++ Software, FPGA, HDL, Linux command, Matlab, Modelsim, Pcie, Programming languages, Debug, Zynq, TCP/IP, VHDL, Verilog, Vivado
Project history
01/2021
-
02/2023
company(remotel
y to US)
September, FPGA Engineer * Design FPGA using
2015 - July, Verilog/VHDL description
2019 language
My profile: https://www.freelancer.com/u/ducdctoandh.html
September, FPGA Engineer * Design FPGA using
y to US)
September, FPGA Engineer * Design FPGA using
2015 - July, Verilog/VHDL description
2019 language
My profile: https://www.freelancer.com/u/ducdctoandh.html
September, FPGA Engineer * Design FPGA using
07/2019
-
02/2023
FPGA architect
September, and coding at Verilog/VHDL description
Local Availability
Open to travel worldwide
