05/31/2025 updated
TM
100 % available
IC Development Engineer
Brighton, United Kingdom
United Kingdom
Microelectronics Systems DesignIC designOptoelectronicsSPICESemiconductorsSignal processingPythonPerlMatlab AnalogC/C++Machine Learningdeep learning CMOSmixed-signal designanalog designRF DesignMachine Learning frameworksSilicon Photonics
Hello,
I bring 15 years experience in advanced mixed-signal IC development, from mm-Wave device characterisation to SoC level verification in a nm-regime CMOS.
Along the way I resolved many chip development issues from I/O Pad power leakage to data communication channel corruption in NFC, and made significant contributions in tape-out, validation and delivery of high quality chips on-schedule and within budget.
In the last 10 years I have paid particular attention to enhancing integral quality processess in chip development within the mixed-signal ASIC verification domain. This manifested in analog and digital circuit analysis, circuit modelling, functional and performance verification of the SoC. This effort was further supported by acquisition and deployment of considerable analog kernel simulation expertise with appreciable numerical, analytical and statistical knowledge within ISO quality audited and accredited mixed-signal work flows.
As my CV shows I am extremely adaptable and have experience in ramping-up in many areas of the chip design methodology flow. Recent experience in mixed-signal UVM bench and testcase development, implemented in mostly SystemVerilog (Transactional and RTL) and C programming for testbench manipulation of digital register control of analog blocks. In parallel I acquired strong analog circuit debug experience across power, signal processing and frequency generation blocks and domains. From the compute/software perspective I am profoundly experienced in Unix Shell scripting, Python, Matlab, Perl and C/C++ programming, and High Performance Computing paradigms.
My recent learning and training has built considerable depth of knowledge in AI, Machine Learning (ML) and in particular the Deep Learning (DL) paradigms. These domains are hold critical leverage in current research into optimal IC design methodologies for analog design automation. I am interested in exploiting ML/DL frameworks and practices to benefit faster and efficient chip development
I am available at the earliest opportunity to engage, and discuss suitable projects with a view to bringing my wealth of skills, experience, knowledge and best 'can do' character to support optimal execution on a challenging project.
Yours sincerely,
Trevor McCook
I bring 15 years experience in advanced mixed-signal IC development, from mm-Wave device characterisation to SoC level verification in a nm-regime CMOS.
Along the way I resolved many chip development issues from I/O Pad power leakage to data communication channel corruption in NFC, and made significant contributions in tape-out, validation and delivery of high quality chips on-schedule and within budget.
In the last 10 years I have paid particular attention to enhancing integral quality processess in chip development within the mixed-signal ASIC verification domain. This manifested in analog and digital circuit analysis, circuit modelling, functional and performance verification of the SoC. This effort was further supported by acquisition and deployment of considerable analog kernel simulation expertise with appreciable numerical, analytical and statistical knowledge within ISO quality audited and accredited mixed-signal work flows.
As my CV shows I am extremely adaptable and have experience in ramping-up in many areas of the chip design methodology flow. Recent experience in mixed-signal UVM bench and testcase development, implemented in mostly SystemVerilog (Transactional and RTL) and C programming for testbench manipulation of digital register control of analog blocks. In parallel I acquired strong analog circuit debug experience across power, signal processing and frequency generation blocks and domains. From the compute/software perspective I am profoundly experienced in Unix Shell scripting, Python, Matlab, Perl and C/C++ programming, and High Performance Computing paradigms.
My recent learning and training has built considerable depth of knowledge in AI, Machine Learning (ML) and in particular the Deep Learning (DL) paradigms. These domains are hold critical leverage in current research into optimal IC design methodologies for analog design automation. I am interested in exploiting ML/DL frameworks and practices to benefit faster and efficient chip development
I am available at the earliest opportunity to engage, and discuss suitable projects with a view to bringing my wealth of skills, experience, knowledge and best 'can do' character to support optimal execution on a challenging project.
Yours sincerely,
Trevor McCook
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