02/22/2023 updated


100 % available
Embedded Software Architect
Bucharest, Romania
Worldwide
M.Sc. Advanced Computing ArchitecturesJava (Programming Language)AdaptabilidadAgile MethodologyArchitectureAssembly LanguageAutomotive IndustryAUTomotive Open System Architecture (AUTOSAR)Bash ShellBooting (BIOS)C Sharp (Programming Language)C++ (Programming Language)IBM Rational ClearCaseCodeWarriorComputer ProgrammingDebugging
Highly motivated senior software engineer with 14+ years of experience in software development and architecture, especially for automotive safety-related embedded applications.
Providing high value for customers by consistently demonstrating adaptability, speed in ramping-up and a strong work ethic.
Strong technical skills that are under continuous improvement, including experience with:
o Texas Instruments Jacinto 7 (TDA4VM) & Sitara, Infineon AURIX 2nd Generation (TC3x7), NXP Qorivva, IBM Cell Broadband Engine
o Broadcom StrataXGS ASICs, Broadcom SDK
o Assembly language and low-level debugging for x86, Tricore, PowerPC
o Autosar Classic Platform (single-core & multi-core) development and architecture
o Automotive bootloader & OS development, ISO 26262, UDS 14229
o Compiler development (ANTLR, JAVACC, LLVM)
o Lauterbach T32, PEmicro, GNU GDB, GLIWA T1
o Vector (VN5610A ETH, VN1610 CAN, GENy, DaVinci Configurator/Developer)
o Ethernet, CAN, LIN, MOST
o Linux user- and kernel-space development, POSIX, WIN32 API, MPI, OpenMP, OpenCV
o C/C++, Python, Java, C#, Scheme, Prolog, Bash
o Programming paradigms: OOP, imperative programming, functional programming
o SVN, CVS, IBM ClearCase, MS Visual SourceSafe, GIT, DOORS
o GNU GCC Compiler Collection, Freescale CodeWarrior, Green Hills Compiler, MS C/C++
Compiler and Linker (cl), Altium Tasking Compiler
o Agile, Waterfall, V-Model
Providing high value for customers by consistently demonstrating adaptability, speed in ramping-up and a strong work ethic.
Strong technical skills that are under continuous improvement, including experience with:
o Texas Instruments Jacinto 7 (TDA4VM) & Sitara, Infineon AURIX 2nd Generation (TC3x7), NXP Qorivva, IBM Cell Broadband Engine
o Broadcom StrataXGS ASICs, Broadcom SDK
o Assembly language and low-level debugging for x86, Tricore, PowerPC
o Autosar Classic Platform (single-core & multi-core) development and architecture
o Automotive bootloader & OS development, ISO 26262, UDS 14229
o Compiler development (ANTLR, JAVACC, LLVM)
o Lauterbach T32, PEmicro, GNU GDB, GLIWA T1
o Vector (VN5610A ETH, VN1610 CAN, GENy, DaVinci Configurator/Developer)
o Ethernet, CAN, LIN, MOST
o Linux user- and kernel-space development, POSIX, WIN32 API, MPI, OpenMP, OpenCV
o C/C++, Python, Java, C#, Scheme, Prolog, Bash
o Programming paradigms: OOP, imperative programming, functional programming
o SVN, CVS, IBM ClearCase, MS Visual SourceSafe, GIT, DOORS
o GNU GCC Compiler Collection, Freescale CodeWarrior, Green Hills Compiler, MS C/C++
Compiler and Linker (cl), Altium Tasking Compiler
o Agile, Waterfall, V-Model
Experience
Professional experience10+ years
Freelancer since2013
Languages
GermanBasic knowledgeEnglishFluentRomanianNative speakerSpanishGood
Project history
For the VW MIK project:
o Created a RAM partitioning concept for a TI Sitara SoC.
o Provided technical support to the system architecture team in creating the system booting concept.
o Reviewed project board schematic and the HSIS document.
o Provided technical support to SW development teams on various topics (e.g. booting sequence, secondary boot loader implementation, Linux device tree, memory layout etc.).
o Supported other SW architects by: creating guidelines for modeling HFSMs, merging of Enterprise Architect models and performing peer reviews.
o Created a RAM partitioning concept for a TI Sitara SoC.
o Provided technical support to the system architecture team in creating the system booting concept.
o Reviewed project board schematic and the HSIS document.
o Provided technical support to SW development teams on various topics (e.g. booting sequence, secondary boot loader implementation, Linux device tree, memory layout etc.).
o Supported other SW architects by: creating guidelines for modeling HFSMs, merging of Enterprise Architect models and performing peer reviews.
For the Conti ADC500 project:
o Provided several fixes for SD-card booting issues of a Texas Instruments SoC (running Autosar OS, Free RTOS and Linux OS) and RAM layout.
o Created concepts for: booting the SoC via a secondary boot loader; eMMC and Flash partitioning.
o Implemented a proof of concept for booting all SoC’s cores (ARM Cortex-A72, ARM Cortex-R5F, C7x DSP) via the secondary boot loader.
o Implemented Lauterbach scripts for SoC AMP (asymmetrical multiprocessing) debugging and flashing of eMMC/NOR Flash.
o Provided several fixes for SD-card booting issues of a Texas Instruments SoC (running Autosar OS, Free RTOS and Linux OS) and RAM layout.
o Created concepts for: booting the SoC via a secondary boot loader; eMMC and Flash partitioning.
o Implemented a proof of concept for booting all SoC’s cores (ARM Cortex-A72, ARM Cortex-R5F, C7x DSP) via the secondary boot loader.
o Implemented Lauterbach scripts for SoC AMP (asymmetrical multiprocessing) debugging and flashing of eMMC/NOR Flash.
For the BMW ADCAM project:
o Revised the SW architecture model and verified that all SW requirements were addressed correctly and completely.
o Performed source code reviews on the SOP candidate release.
o Analyzed the safety mechanisms already available in the SOP candidate release SW.
o Identified several critical safety mechanisms in the MCU’s AoUs that were not implemented and provided technical guidance on how to implement.
o Revised the SW architecture model and verified that all SW requirements were addressed correctly and completely.
o Performed source code reviews on the SOP candidate release.
o Analyzed the safety mechanisms already available in the SOP candidate release SW.
o Identified several critical safety mechanisms in the MCU’s AoUs that were not implemented and provided technical guidance on how to implement.