11/11/2026 updated
100 % available
Principal Analog / RF / mmWave IC Design Engineer | Power Amplifiers | GaN MMIC | RFIC Design
COLOMBELLES, France
Germany +10
PhD in Electronics, Power Amplifier Design, NXP x IMS laboratory (2016-2019)info: Germany, Austria, Switzerland, United Kingdom, Spain, Italy, France, Belgium, Finland, Luxembourg, Sweden
About me
PA designer at heart: 10+ years at NXP taking RF power amplifiers from spec to silicon. I enjoy hard problems (efficiency at back-off, broadband GaN, mmWave) and close teamwork with system, layout and test teams. Based in Caen, France. French, English, Arabic.
Design and TechnologyCadence VirtuosoSatcom5G (Telecommunication)Rf CircuitsPower CircuitsMissile Defense
Power Amplifier Design & Optimization
Extensive expertise in designing and optimizing power amplifiers across multiple technologies including GaN-on-SiC MMIC, QuBiC4Xi 0.25 um, and GlobalFoundries 22FDX RF-SOI. Deep knowledge of Doherty architectures, envelope tracking, DPD, electro-thermal analysis, and PA reliability considerations covering output power, efficiency, linearity, bandwidth, and area trade-offs.
RFIC and mmWave IC Design
Comprehensive experience in full RF and millimeter-wave integrated-circuit design cycles, from architecture definition and schematic design to layout optimization, EM simulation, EM/RC partitioning, post-layout verification, and silicon validation. Proficient with tools such as Cadence Virtuoso, SpectreRF, ADS, Cadence AWR Microwave Office, and EMX.
RF Building Blocks: Switches, Couplers & Passive Structures
Proven ability to design RF switches, directional couplers, matching networks, and integrated passive structures. Skilled in optimizing directivity, coupling factor, insertion loss, on-resistance, off-state capacitance, and silicon area for efficient integration.
GaN MMIC Design for Space & Defence
Hands-on experience with GaN HPAs for space applications including ESA tenders, L-band PNT with envelope tracking and DPD, C-band Doherty and DPD, and multiband reconfigurable GaN PAs for LEO direct-to-device 5G NTN satellites. Technical lead for proposals and foundry interface for wideband GaN defence concepts.
Electro-thermal Analysis & PA Reliability
Specialized knowledge in electro-thermal simulation and analysis to ensure junction temperature compliance, development of junction-to-die thermal models, thermally compliant floorplanning, and study of self-heating and thermal coupling impacts on PA performance, reliability, and lifetime.
Silicon Characterization & Measurement
Experienced in laboratory characterization including ATBs, DC consumption, SP, Pout, P1dB, PAE, EVM measurements. Demonstrated results include 28 dB gain, 0 dBm output power, 25 mW power consumption, 11 GHz bandwidth, and 4 dBm OP1dB at 60 GHz.
5G NTN & Wireless Interface Technologies
Knowledge of Space PNT (L/C band), LEO direct-to-device 5G NTN, Wi-Fi 6, Wi-Fi 6E, and 60 GHz wireless interface standards and system-level requirements for PA architecture definition.
EDA Tools & Simulation Platforms
Proficient in Cadence AWR Microwave Office, Cadence Virtuoso, SpectreRF, ADS, ADS thermal, EMX, and MATLAB for circuit design, EM simulation, and performance optimization.
Patents & Scientific Publications
Author and co-author of multiple patents and peer-reviewed publications including European patent applications and IEEE MTT-S RFIC Symposium contributions covering signal amplifier design, temperature correction circuits, and adaptive biasing for power amplifiers.
Extensive expertise in designing and optimizing power amplifiers across multiple technologies including GaN-on-SiC MMIC, QuBiC4Xi 0.25 um, and GlobalFoundries 22FDX RF-SOI. Deep knowledge of Doherty architectures, envelope tracking, DPD, electro-thermal analysis, and PA reliability considerations covering output power, efficiency, linearity, bandwidth, and area trade-offs.
RFIC and mmWave IC Design
Comprehensive experience in full RF and millimeter-wave integrated-circuit design cycles, from architecture definition and schematic design to layout optimization, EM simulation, EM/RC partitioning, post-layout verification, and silicon validation. Proficient with tools such as Cadence Virtuoso, SpectreRF, ADS, Cadence AWR Microwave Office, and EMX.
RF Building Blocks: Switches, Couplers & Passive Structures
Proven ability to design RF switches, directional couplers, matching networks, and integrated passive structures. Skilled in optimizing directivity, coupling factor, insertion loss, on-resistance, off-state capacitance, and silicon area for efficient integration.
GaN MMIC Design for Space & Defence
Hands-on experience with GaN HPAs for space applications including ESA tenders, L-band PNT with envelope tracking and DPD, C-band Doherty and DPD, and multiband reconfigurable GaN PAs for LEO direct-to-device 5G NTN satellites. Technical lead for proposals and foundry interface for wideband GaN defence concepts.
Electro-thermal Analysis & PA Reliability
Specialized knowledge in electro-thermal simulation and analysis to ensure junction temperature compliance, development of junction-to-die thermal models, thermally compliant floorplanning, and study of self-heating and thermal coupling impacts on PA performance, reliability, and lifetime.
Silicon Characterization & Measurement
Experienced in laboratory characterization including ATBs, DC consumption, SP, Pout, P1dB, PAE, EVM measurements. Demonstrated results include 28 dB gain, 0 dBm output power, 25 mW power consumption, 11 GHz bandwidth, and 4 dBm OP1dB at 60 GHz.
5G NTN & Wireless Interface Technologies
Knowledge of Space PNT (L/C band), LEO direct-to-device 5G NTN, Wi-Fi 6, Wi-Fi 6E, and 60 GHz wireless interface standards and system-level requirements for PA architecture definition.
EDA Tools & Simulation Platforms
Proficient in Cadence AWR Microwave Office, Cadence Virtuoso, SpectreRF, ADS, ADS thermal, EMX, and MATLAB for circuit design, EM simulation, and performance optimization.
Patents & Scientific Publications
Author and co-author of multiple patents and peer-reviewed publications including European patent applications and IEEE MTT-S RFIC Symposium contributions covering signal amplifier design, temperature correction circuits, and adaptive biasing for power amplifiers.
Experience
Professional experience10+ years
Freelancer since2026
Languages
EnglishFluentFrenchNative speaker
Project history
Co-founded SkyBand Semiconductors in Caen, France. Designing GaN HPAs for space (ESA tenders) including L-band PNT with envelope tracking and DPD, and C-band with Doherty and DPD. Developing multiband reconfigurable GaN PAs for LEO direct-to-device 5G NTN satellites. Performing line-up, unit-cell sizing, load-pull, stability, and electro-thermal analysis on GaN-on-SiC using AWR Microwave Office. Acting as technical lead for proposals and foundry interface for wideband GaN defence concepts with built-in test.
Senior IC designer at NXP Semiconductors in Colombelles, France. Led multiple projects including a 60 GHz power amplifier for high-data-rate low-power wireless interface in GlobalFoundries 22FDX RF-SOI technology, a Wi-Fi 6 / Wi-Fi 6E power amplifier in QuBiC4Xi 0.25 um technology, and an integrated directional coupler at PA output. Responsible for full design cycle from architecture definition to silicon validation, including schematic design, EM/RC partitioning, layout optimization, and laboratory characterization.
Conducted PhD research on PA Design Based on Electro-thermal Considerations. Investigated gain variation with temperature and its impact on EVM, simulated and measured thermal gradients across the power amplifier and die, developed a junction-to-die thermal model, optimized PA unit-cell floorplanning to reduce junction temperature, and studied self-heating and thermal coupling impacts on PA performance, reliability, and lifetime.