08/11/2026 updated
Premium member
100 % availableEmbedded Software Architect | Secure IoT, Cloud Connectivity & Network Stacks | 25+ Years | Remote
Santa Teresa Gallura, Italy
Only remote
Dipl.Ing. (FH) Electrical EngineeringAbout me
Embedded software architect, 25+ yrs. I design the software architecture of connected devices: network stacks (TCP/IP, TLS, MQTT, CAN-FD), secure cloud connectivity, ARM Cortex-M. Remote-first, occasional on-site for hardware bring-up. Available for remote projects now.
AI AgentsLLMC (Programming Language)C++ (Programming Language)CAN BusEmbedded CEmbedded SystemsLinux On Embedded SystemsEmbedded Operating SystemsEmbedded SoftwareEthernetFreeRTOSCyber Security StandardsNetwork ArchitectureSoftware Architecture
EMBEDDED SOFTWARE ARCHITECT
25+ years turning hardware platforms into maintainable, secure, testable software systems. I take architecture responsibility: layering, module boundaries, concurrency model, memory strategy, interface contracts between firmware and cloud - and I implement what I design. Production systems for automotive, industrial, medical and laboratory equipment.
ARCHITECTURE & DESIGN
- System and software architecture for connected devices
- Layered and event-driven architecture, design patterns, interface contracts
- Concurrency and multi-core design, memory and caching strategy, MPU-based protection
- Verifiability without hardware: device behaviour simulated on Windows as a virtual device clone running the actual firmware
- Code reviews, technical documentation, team mentoring
NETWORK & PROTOCOL STACK (remote-capable, screen-bound work)
- Complete TCP/IP stack implementation, TLS 1.2/1.3 with mbedTLS and hardware acceleration
- Certificate management and certificate pinning, secure communication design
- EU Cyber Resilience Act (CRA) requirements for connected devices
- HTTP(S), REST, MQTT, JSON
- Automotive and marine protocols: CAN-FD, J1939, NMEA2000, ISO 15765-2, ISO 14230, UDS, ODX
- Ethernet PHY/MAC integration: NXP SJA1110, TI DP83867/8381X; RGMII, SGMII, MII, 100BASE-T1, 1000BASE-TX
- Performance optimization and debugging of network stacks
PLATFORMS
ARM Cortex-M (M0/M3/M33/M4/M7): NXP i.MX RT1062, LPC17xx, SJA1110; STM32H5/H7; Infineon XMC7200D. Deep understanding of ARM CMSIS, memory architecture and performance tuning.
RTOS & OS
FreeRTOS (extensive production experience), CMSIS-RTOS, Keil RTX, NuttX, bare-metal, Embedded Linux and kernel modules.
LANGUAGES
C (MISRA-compliant), C++14/17/20 with STL, Rust, C#/.NET. Object-oriented design, multi-threaded applications, memory-safe programming, static analysis.
DRIVERS & INTERFACES
Bootloaders, flash (NOR/PSRAM), EEPROM, DMA, SPI/SSP, I2C, UART, RS-232/RS-485, USB (WCID), SAI/I2S, ADC, GPIO, timers, watchdogs, inter-core communication.
DEBUGGING & VALIDATION
SEGGER J-Link, ST-Link, SWD, JTAG, ETM trace; logic analyzer, oscilloscope, CAN/Ethernet sniffers; Vector CANoe, Busmaster, KCANMonitor; Ethernet qualification and compliance testing; unit and integration testing strategies.
AI INTEGRATION ON CONSTRAINED DEVICES
Local inference and translation pipelines, e.g. Ollama with Translategemma or Strata with Qwen3.8-Flash-Next, device-to-model interfaces.
Remote-first. Occasional on-site for hardware bring-up or lab validation.
Experience
Professional experience10+ years
Freelancer since2002
Languages
GermanNative speakerEnglishFluentFrenchBasic knowledgeItalianBasic knowledge
Project history
Development of System Architecture and Implementation in C/C++ based on Infineon XMC7200D
System architecture and implementation in C/C++ on the Infineon XMC7200D platform. Brought up the Ethernet subsystem (NXP SJA1110) including TI DP83867IR PHY integration, ran hardware debugging, and completed Ethernet compliance validation. Secure communication via TLS (mbedTLS) with certificate pinning on a multicore design with MPU-based memory protection.
Technologies
Architecture, multicore, MPU, caching strategy, SMIF, PSRAM, NOR flash, inter-core communication, device drivers, Infineon PDL, TLS, Ethernet.
Project Size: 6 people
Marine Instrument VMH35D, Device Driver MCP2518
Marine instrument VMH35D. Designed and implemented the MCP2518FD device driver for CAN-FD, including the concept for 1-Wire (MOSI/MISO) SPI utilisation, as a proof of concept. J1939 stack and gateway functionality for NMEA2000 on STM32 (Cortex-M33/M7).
Technologies
C/C++, STM32Cube, CAN-FD, J1939, NMEA2000 gateway, SPI, I2C, UART, LabWindows/CVI, Git.
Project Size: 3 people
Development of Device Platform (Büchi Labortechnik)
Developed the next-generation device platform on NXP i.MX RT1062: FreeRTOS, C++ with STL, REST API handling with nlohmann, LWIP web server. Built the MQTT communication layer that became the IoT layer for all Büchi products. Made the platform verifiable without hardware by simulating device functionality on Windows as a virtual device clone running the actual firmware.
Technologies
Architecture, multithreading, algorithms, MQTT, REST, JSON, LWIP, TCP/IP, Ethernet, FreeRTOS, Doxygen, Git, C/C++/C#.
Project Size: 10 people