Profileimage by Davide Lequile ASIC RTL Principal Digital Designer from London

Davide Lequile

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Last update: 03.11.2020

ASIC RTL Principal Digital Designer

Graduation: MSEE - Master in Electronic Engineering, specialization in Microelectronics - Vote 110/110 Cum Laude / With Honors
Hourly-/Daily rates: show
Negotiable for long term contract
Languages: English (Full Professional) | French (Full Professional) | Italian (Native or Bilingual)

Keywords

Soc Digital Designer VHDL Verilog ARM DSP ASIC RTL 5G

Attachments

Lequile_CV_2021.pdf

Skills

Freelancer-Contractor since 2009
Expert in the area of ASIC RTL conception and development,
with particular attention to Speed and Power optimization.
Used to work closely with management, often involved in customer meetings.

My main domains of expertise are :
ASIC / SoC / IPs
Digital Front-End Designer Engineer involved in :
-RTL Conception
-VHDL (Verilog) coding
-Validation/Verification
-Synthesis

Project history

STM, ASTEK, NXP, IMGTEC, S3, Freelance

Time and spatial flexibility

-At least one week
Available in Europe for full-time contracts only.

Other

Even though all my experience is for the whole Front-End ASIC development flow,
I'm particular interested, as I'm an expert, in RTL conception/development and VHDL (Verilog) coding with particular
attention to Speed and Power optimization.


Good inter-personal and planning skills, organized approach.

• Strong problem solving and trouble shooting skills
• Internally and externally Customer-oriented, capability to listen the others
• Sense of responsibility, pro-active behaviour
• Commitment
• Open-minded
• Rigorous, methodical and organized
• Strong Analytic skills

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